Wafer Level 3-d ICs Process Technology (Integrated Circuits and Systems)
Ronald J. Gutmann (Edited by) and Chuan Seng Tan (Edited by) and L. Rafael Reif (Edited by)
ISBN: | 9781441945624 |
Publisher: | Springer |
Published: | 28 October, 2010 |
Format: | Paperback |
Editions: |
2 other editions
of this product
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Wafer Level 3-d ICs Process Technology (Integrated Circuits and Systems)
Ronald J. Gutmann (Edited by) and Chuan Seng Tan (Edited by) and L. Rafael Reif (Edited by)
This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.
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